Public/LMK04828_Config_Cal
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases 1 Wiki Activity
LMK04828_Config_Cal/LMK_Preset.c

255 lines
9.1 KiB
C
Raw Blame History

/*
* LMK_Preset.c
*
* Created on: 2025.01.16
* Author: TiferKing
*/
#include "LMK_Preset.h"
#ifdef LMK_PRESET_NONE
#endif //LMK_PRESET_NONE
#ifdef LMK_PRESET_IW_RFSOC_2T2R_INTERNAL
#include "xspips.h"
int LMK_ConfigSetRegister(LMK_Config *DevConfig, LMK_Simple *SimpleConfig)
{
int i;
// Calculate Register Value
DevConfig->Config.OSCout_FMT = 0;
DevConfig->Config.OSCout_MUX = 1;
DevConfig->Config.VCO_MUX = SimpleConfig->Generated.VCOSelect;
DevConfig->Config.SYSREF_MUX = 3;
DevConfig->Config.SYSREF_DIVH = SimpleConfig->Generated.SYSREF_DIV >> 8;
DevConfig->Config.SYSREF_DIVL = SimpleConfig->Generated.SYSREF_DIV & 0xFF;
DevConfig->Config.PLL1_NCLK_MUX = 0;
DevConfig->Config.PLL2_NCLK_MUX = 0;
DevConfig->Config.SYNC_DIS0 = 1;
DevConfig->Config.SYNC_DIS2 = 1;
DevConfig->Config.SYNC_DIS4 = 1;
DevConfig->Config.SYNC_DIS6 = 1;
DevConfig->Config.SYNC_DIS8 = 1;
DevConfig->Config.SYNC_DIS10 = 1;
DevConfig->Config.SYNC_DIS12 = 1;
DevConfig->Config.SYNC_DISSYSREF = 1;
DevConfig->Config.CLKin0_TYPE = 0;
DevConfig->Config.CLKin1_TYPE = 0;
DevConfig->Config.CLKin2_TYPE = 0;
DevConfig->Config.CLKin0_EN = 0;
DevConfig->Config.CLKin1_EN = 0;
DevConfig->Config.CLKin2_EN = 0;
DevConfig->Config.CLKin0_OUT_MUX = 3;
// Set CLKin with SPI, release CLKin_SEL0 PIN.
DevConfig->Config.CLKin1_OUT_MUX = 3;
DevConfig->Config.CLKin_SEL_MODE = 2;
// Set CLKin_SEL0 as SPI readback.
DevConfig->Config.CLKin_SEL0_TYPE = 3;
DevConfig->Config.CLKin_SEL0_MUX = 6;
DevConfig->Config.CLKin_SEL1_TYPE = 0;
DevConfig->Config.CLKin_SEL1_MUX = 0;
DevConfig->Config.SDIO_RDBK_TYPE = 0;
DevConfig->Config.RESET_TYPE = 2;
DevConfig->Config.RESET_MUX = 0;
DevConfig->Config.CLKin2_RH = SimpleConfig->Generated.CLKin_R >> 8;
DevConfig->Config.CLKin2_RL = SimpleConfig->Generated.CLKin_R & 0xFF;
DevConfig->Config.PLL1_NH = SimpleConfig->Generated.PLL1_N >> 8;
DevConfig->Config.PLL1_NL = SimpleConfig->Generated.PLL1_N & 0xFF;
DevConfig->Config.PLL1_LD_TYPE = 3;
DevConfig->Config.PLL1_LD_MUX = 1;
DevConfig->Config.PLL2_RH = SimpleConfig->Generated.PLL2_R >> 8;
DevConfig->Config.PLL2_RL = SimpleConfig->Generated.PLL2_R & 0xFF;
DevConfig->Config.PLL2_REF_2X_EN = 0;
DevConfig->Config.PLL2_XTAL_EN = 0;
DevConfig->Config.OSCin_FREQ = 4;
DevConfig->Config.PLL2_P = 2;
DevConfig->Config.PLL2_NH = (SimpleConfig->Generated.PLL2_N >> 16) & 0xFF;
DevConfig->Config.PLL2_FCAL_DIS = 0;
DevConfig->Config.PLL2_NM = (SimpleConfig->Generated.PLL2_N >> 8) & 0xFF;
DevConfig->Config.PLL2_NL = SimpleConfig->Generated.PLL2_N & 0xFF;
DevConfig->Config.PLL2_LD_TYPE = 3;
DevConfig->Config.PLL2_LD_MUX = 2;
for(i = 0; i < 7; i++)
{
if(SimpleConfig->Generated.DCLKout_Div[i] != 0)
{
DevConfig->Config.Clock[i].DCLKout_Div = SimpleConfig->Generated.DCLKout_Div[i];
DevConfig->Config.Clock[i].DCLKout_MUX = 1;
DevConfig->Config.Clock[i].SDCLKout_HS = 1;
DevConfig->Config.Clock[i].SDCLKout_DDLY = 0;
DevConfig->Config.Clock[i].SDCLKout_MUX = 1;
DevConfig->Config.Clock[i].DCLKout_HS = 0;
DevConfig->Config.Clock[i].SDCLKout_PD = 0;
DevConfig->Config.Clock[i].SDCLKout_DIS_MODE = 0;
DevConfig->Config.Clock[i].CLKout_PD = 0;
DevConfig->Config.Clock[i].DCLKout_ADLY_PD = 1;
DevConfig->Config.Clock[i].DCLKout_ADLYg_PD = 1;
DevConfig->Config.Clock[i].DCLKout_HSg_PD = 0;
DevConfig->Config.Clock[i].DCLKout_DDLY_PD = 1;
DevConfig->Config.Clock[i].DCLKout_FMT = 1;
DevConfig->Config.Clock[i].DCLKout_POL = 0;
DevConfig->Config.Clock[i].SDCLKout_FMT = 1;
DevConfig->Config.Clock[i].SDCLKout_POL = 0;
}
}
return LMK_SUCCESS;
}
int LMK_WriteReg(LMK_Config *DevConfig, u16 RegisterAddress, u8 Value)
{
u8 writebuf[3];
writebuf[0] = 0x0 | ((RegisterAddress >> 8) & 0x1F);
writebuf[1] = RegisterAddress & 0xFF;
writebuf[2] = Value;
XSpiPs_SetSlaveSelect((XSpiPs *)DevConfig->InterfaceInst, 0x00);
XSpiPs_PolledTransfer((XSpiPs *)DevConfig->InterfaceInst, writebuf, NULL, 3);
XSpiPs_SetSlaveSelect((XSpiPs *)DevConfig->InterfaceInst, 0x0F);
return LMK_SUCCESS;
}
int LMK_ReadReg(LMK_Config *DevConfig, u16 RegisterAddress, u8 *Value)
{
u8 readbuf[3];
readbuf[0] = 0x80 | ((RegisterAddress >> 8) & 0x1F);
readbuf[1] = RegisterAddress & 0xFF;
readbuf[2] = 0;
XSpiPs_SetSlaveSelect((XSpiPs *)DevConfig->InterfaceInst, 0x00);
XSpiPs_PolledTransfer((XSpiPs *)DevConfig->InterfaceInst, readbuf, readbuf, 3);
XSpiPs_SetSlaveSelect((XSpiPs *)DevConfig->InterfaceInst, 0x0F);
*Value = readbuf[2];
return LMK_SUCCESS;
}
#endif //LMK_PRESET_IW_RFSOC_2T2R_INTERNAL
#ifdef LMK_PRESET_IW_RFSOC_2T2R_EXTERNAL
#include "xspips.h"
int LMK_ConfigSetRegister(LMK_Config *DevConfig, LMK_Simple *SimpleConfig)
{
int i;
// Calculate Register Value
DevConfig->Config.OSCout_FMT = 0;
DevConfig->Config.OSCout_MUX = 1;
DevConfig->Config.VCO_MUX = SimpleConfig->Generated.VCOSelect;
DevConfig->Config.SYSREF_MUX = 3;
DevConfig->Config.SYSREF_DIVH = SimpleConfig->Generated.SYSREF_DIV >> 8;
DevConfig->Config.SYSREF_DIVL = SimpleConfig->Generated.SYSREF_DIV & 0xFF;
DevConfig->Config.PLL1_NCLK_MUX = 0;
DevConfig->Config.PLL2_NCLK_MUX = 0;
DevConfig->Config.SYNC_DIS0 = 1;
DevConfig->Config.SYNC_DIS2 = 1;
DevConfig->Config.SYNC_DIS4 = 1;
DevConfig->Config.SYNC_DIS6 = 1;
DevConfig->Config.SYNC_DIS8 = 1;
DevConfig->Config.SYNC_DIS10 = 1;
DevConfig->Config.SYNC_DIS12 = 1;
DevConfig->Config.SYNC_DISSYSREF = 1;
DevConfig->Config.CLKin0_TYPE = 0;
DevConfig->Config.CLKin1_TYPE = 0;
DevConfig->Config.CLKin2_TYPE = 0;
DevConfig->Config.CLKin0_EN = 0;
DevConfig->Config.CLKin1_EN = 0;
DevConfig->Config.CLKin2_EN = 0;
DevConfig->Config.CLKin0_OUT_MUX = 3;
// Set CLKin with SPI, release CLKin_SEL0 PIN.
DevConfig->Config.CLKin1_OUT_MUX = 2;
DevConfig->Config.CLKin_SEL_MODE = 1;
// Set CLKin_SEL0 as SPI readback.
DevConfig->Config.CLKin_SEL0_TYPE = 3;
DevConfig->Config.CLKin_SEL0_MUX = 6;
DevConfig->Config.CLKin_SEL1_TYPE = 0;
DevConfig->Config.CLKin_SEL1_MUX = 0;
DevConfig->Config.SDIO_RDBK_TYPE = 0;
DevConfig->Config.RESET_TYPE = 2;
DevConfig->Config.RESET_MUX = 0;
DevConfig->Config.CLKin1_RH = SimpleConfig->Generated.CLKin_R >> 8;
DevConfig->Config.CLKin1_RL = SimpleConfig->Generated.CLKin_R & 0xFF;
DevConfig->Config.PLL1_NH = SimpleConfig->Generated.PLL1_N >> 8;
DevConfig->Config.PLL1_NL = SimpleConfig->Generated.PLL1_N & 0xFF;
DevConfig->Config.PLL1_LD_TYPE = 3;
DevConfig->Config.PLL1_LD_MUX = 1;
DevConfig->Config.PLL2_RH = SimpleConfig->Generated.PLL2_R >> 8;
DevConfig->Config.PLL2_RL = SimpleConfig->Generated.PLL2_R & 0xFF;
DevConfig->Config.PLL2_REF_2X_EN = 0;
DevConfig->Config.PLL2_XTAL_EN = 0;
DevConfig->Config.OSCin_FREQ = 4;
DevConfig->Config.PLL2_P = 2;
DevConfig->Config.PLL2_NH = (SimpleConfig->Generated.PLL2_N >> 16) & 0xFF;
DevConfig->Config.PLL2_FCAL_DIS = 0;
DevConfig->Config.PLL2_NM = (SimpleConfig->Generated.PLL2_N >> 8) & 0xFF;
DevConfig->Config.PLL2_NL = SimpleConfig->Generated.PLL2_N & 0xFF;
DevConfig->Config.PLL2_LD_TYPE = 3;
DevConfig->Config.PLL2_LD_MUX = 2;
for(i = 0; i < 7; i++)
{
if(SimpleConfig->Generated.DCLKout_Div[i] != 0)
{
DevConfig->Config.Clock[i].DCLKout_Div = SimpleConfig->Generated.DCLKout_Div[i];
DevConfig->Config.Clock[i].DCLKout_MUX = 1;
DevConfig->Config.Clock[i].SDCLKout_HS = 1;
DevConfig->Config.Clock[i].SDCLKout_DDLY = 0;
DevConfig->Config.Clock[i].SDCLKout_MUX = 1;
DevConfig->Config.Clock[i].DCLKout_HS = 0;
DevConfig->Config.Clock[i].SDCLKout_PD = 0;
DevConfig->Config.Clock[i].SDCLKout_DIS_MODE = 0;
DevConfig->Config.Clock[i].CLKout_PD = 0;
DevConfig->Config.Clock[i].DCLKout_ADLY_PD = 1;
DevConfig->Config.Clock[i].DCLKout_ADLYg_PD = 1;
DevConfig->Config.Clock[i].DCLKout_HSg_PD = 0;
DevConfig->Config.Clock[i].DCLKout_DDLY_PD = 1;
DevConfig->Config.Clock[i].DCLKout_FMT = 1;
DevConfig->Config.Clock[i].DCLKout_POL = 0;
DevConfig->Config.Clock[i].SDCLKout_FMT = 1;
DevConfig->Config.Clock[i].SDCLKout_POL = 0;
}
}
return LMK_SUCCESS;
}
int LMK_WriteReg(LMK_Config *DevConfig, u16 RegisterAddress, u8 Value)
{
u8 writebuf[3];
writebuf[0] = 0x0 | ((RegisterAddress >> 8) & 0x1F);
writebuf[1] = RegisterAddress & 0xFF;
writebuf[2] = Value;
XSpiPs_SetSlaveSelect((XSpiPs *)DevConfig->InterfaceInst, 0x00);
XSpiPs_PolledTransfer((XSpiPs *)DevConfig->InterfaceInst, writebuf, NULL, 3);
XSpiPs_SetSlaveSelect((XSpiPs *)DevConfig->InterfaceInst, 0x0F);
return LMK_SUCCESS;
}
int LMK_ReadReg(LMK_Config *DevConfig, u16 RegisterAddress, u8 *Value)
{
u8 readbuf[3];
readbuf[0] = 0x80 | ((RegisterAddress >> 8) & 0x1F);
readbuf[1] = RegisterAddress & 0xFF;
readbuf[2] = 0;
XSpiPs_SetSlaveSelect((XSpiPs *)DevConfig->InterfaceInst, 0x00);
XSpiPs_PolledTransfer((XSpiPs *)DevConfig->InterfaceInst, readbuf, readbuf, 3);
XSpiPs_SetSlaveSelect((XSpiPs *)DevConfig->InterfaceInst, 0x0F);
*Value = readbuf[2];
return LMK_SUCCESS;
}
#endif //LMK_PRESET_IW_RFSOC_2T2R_EXTERNAL
Reference in New Issue View Git Blame Copy Permalink