Set default channel configuration

This commit is contained in:
Tifer King 2025-01-18 02:40:25 +08:00
parent 8f2f72188b
commit afa9e1712d

View File

@ -252,74 +252,37 @@ __weak int LMK_ConfigSetRegister(LMK_Config *DevConfig, LMK_Simple *SimpleConfig
for(i = 0; i < 7; i++) for(i = 0; i < 7; i++)
{ {
if(VCORate / SimpleConfig->DClockRate[i] != 0) DevConfig->Config.Clock[i].DCLKout_Div = 0;
{ DevConfig->Config.Clock[i].CLKout_IDL = 0;
DevConfig->Config.Clock[i].DCLKout_Div = VCORate / SimpleConfig->DClockRate[i]; DevConfig->Config.Clock[i].CLKout_ODL = 0;
DevConfig->Config.Clock[i].CLKout_IDL = 0;
DevConfig->Config.Clock[i].CLKout_ODL = 0;
DevConfig->Config.Clock[i].DCLKout_DDLY_CNTL = 2; DevConfig->Config.Clock[i].DCLKout_DDLY_CNTL = 5;
DevConfig->Config.Clock[i].DCLKout_DDLY_CNTH = 2; DevConfig->Config.Clock[i].DCLKout_DDLY_CNTH = 5;
DevConfig->Config.Clock[i].DCLKout_MUX = 1; DevConfig->Config.Clock[i].DCLKout_MUX = 0;
DevConfig->Config.Clock[i].DCLKout_ADLY_MUX = 1; DevConfig->Config.Clock[i].DCLKout_ADLY_MUX = 0;
DevConfig->Config.Clock[i].DCLKout_ALDY = 0; DevConfig->Config.Clock[i].DCLKout_ALDY = 0;
DevConfig->Config.Clock[i].SDCLKout_HS = 0; DevConfig->Config.Clock[i].SDCLKout_HS = 0;
DevConfig->Config.Clock[i].SDCLKout_DDLY = 0; DevConfig->Config.Clock[i].SDCLKout_DDLY = 0;
DevConfig->Config.Clock[i].SDCLKout_MUX = 1; DevConfig->Config.Clock[i].SDCLKout_MUX = 0;
DevConfig->Config.Clock[i].DCLKout_HS = 0; DevConfig->Config.Clock[i].DCLKout_HS = 0;
DevConfig->Config.Clock[i].SDCLK_ADLY = 0; DevConfig->Config.Clock[i].SDCLK_ADLY = 0;
DevConfig->Config.Clock[i].SDCLKout_ADLY_EN = 0; DevConfig->Config.Clock[i].SDCLKout_ADLY_EN = 0;
DevConfig->Config.Clock[i].SDCLKout_PD = 0; DevConfig->Config.Clock[i].SDCLKout_PD = 1;
DevConfig->Config.Clock[i].SDCLKout_DIS_MODE = 0; DevConfig->Config.Clock[i].SDCLKout_DIS_MODE = 0;
DevConfig->Config.Clock[i].CLKout_PD = 0; DevConfig->Config.Clock[i].CLKout_PD = 1;
DevConfig->Config.Clock[i].DCLKout_ADLY_PD = 1; DevConfig->Config.Clock[i].DCLKout_ADLY_PD = 1;
DevConfig->Config.Clock[i].DCLKout_ADLYg_PD = 1; DevConfig->Config.Clock[i].DCLKout_ADLYg_PD = 1;
DevConfig->Config.Clock[i].DCLKout_HSg_PD = 0; DevConfig->Config.Clock[i].DCLKout_HSg_PD = 1;
DevConfig->Config.Clock[i].DCLKout_DDLY_PD = 0; DevConfig->Config.Clock[i].DCLKout_DDLY_PD = 0;
DevConfig->Config.Clock[i].DCLKout_FMT = 1; DevConfig->Config.Clock[i].DCLKout_FMT = 0;
DevConfig->Config.Clock[i].DCLKout_POL = 0; DevConfig->Config.Clock[i].DCLKout_POL = 0;
DevConfig->Config.Clock[i].SDCLKout_FMT = 1; DevConfig->Config.Clock[i].SDCLKout_FMT = 0;
DevConfig->Config.Clock[i].SDCLKout_POL = 0; DevConfig->Config.Clock[i].SDCLKout_POL = 0;
}
else
{
DevConfig->Config.Clock[i].DCLKout_Div = 0;
DevConfig->Config.Clock[i].CLKout_IDL = 0;
DevConfig->Config.Clock[i].CLKout_ODL = 0;
DevConfig->Config.Clock[i].DCLKout_DDLY_CNTL = 5;
DevConfig->Config.Clock[i].DCLKout_DDLY_CNTH = 5;
DevConfig->Config.Clock[i].DCLKout_MUX = 1;
DevConfig->Config.Clock[i].DCLKout_ADLY_MUX = 1;
DevConfig->Config.Clock[i].DCLKout_ALDY = 0;
DevConfig->Config.Clock[i].SDCLKout_HS = 0;
DevConfig->Config.Clock[i].SDCLKout_DDLY = 0;
DevConfig->Config.Clock[i].SDCLKout_MUX = 1;
DevConfig->Config.Clock[i].DCLKout_HS = 0;
DevConfig->Config.Clock[i].SDCLK_ADLY = 0;
DevConfig->Config.Clock[i].SDCLKout_ADLY_EN = 0;
DevConfig->Config.Clock[i].SDCLKout_PD = 1;
DevConfig->Config.Clock[i].SDCLKout_DIS_MODE = 0;
DevConfig->Config.Clock[i].CLKout_PD = 1;
DevConfig->Config.Clock[i].DCLKout_ADLY_PD = 1;
DevConfig->Config.Clock[i].DCLKout_ADLYg_PD = 1;
DevConfig->Config.Clock[i].DCLKout_HSg_PD = 1;
DevConfig->Config.Clock[i].DCLKout_DDLY_PD = 1;
DevConfig->Config.Clock[i].DCLKout_FMT = 0;
DevConfig->Config.Clock[i].DCLKout_POL = 0;
DevConfig->Config.Clock[i].SDCLKout_FMT = 0;
DevConfig->Config.Clock[i].SDCLKout_POL = 0;
}
} }
return LMK_SUCCESS; return LMK_SUCCESS;
} }